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Advanced power management: The next step in DSP board design

By
Ian Stalker
Curtiss-Wright Controls Embedded Computing

As multiprocessor systems such as those used in military DSP applications continue their rise in performance and power, it becomes increasingly critical to obtain accurate data on per-slot power dissipation. This can be a real challenge unless boards are provided with advanced power management and temperature monitoring capabilities.

Editor‚Äôs note: Author Ian Stalker comments that ‚Äúhalf of the DSP system design challenge is about power.‚Äù I‚Äôm sure the other half of the challenge is a combination of algorithm optimization and routing data between processors both intra- and inter-board. The latter implies conducting gigabit-per-second signals between the myriad processors that form modern heterogeneous and homogeneous processing nodes. OpenVPX ‚Äì the specification that builds interoperability into VITA‚Äôs VPX (VITA 46) architecture ‚Äì is all about moving hundreds of signal traces between boards at gigabit speeds.

Embedded digital signal processing engines for military applications are typically limited by the amount of power they are able to dissipate or by how much power the chassis is able to absorb. Their onboard processors – often two or four on a single board or even multiple boards in a single SWaP-savvy chassis – can test the limits of a system’s ability to manage power: both the power required to drive the DSP boards and the power dissipated by them. In the world of airborne DSP applications, having a good handle on power can be critical for helping to keep system weight down.

It’s no exaggeration to say that today, half of the DSP system design challenge is about power. This challenge can be eased by a new design approach that adds advanced power management capabilities and temperature monitoring to DSP engines, enabling the measurement of power dissipation on each card. Adding onboard power management to DSP engine cards will provide more accurate information about system performance, freeing integrators from the costly pressure to “overdesign” their systems, and enabling improved cooling system designs. The result will be significant cost savings and greater system reliability.

Increased power dissipation drives the need for accurate measurement

The problem of managing high-power electronics on signal processing cards has become increasingly critical. In the past, say 15 years ago, a customer might have asked “what’s the maximum power of the card?” and a board vendor would reply with a single “maximum” power number, essentially a “worst-case scenario” number. System integrators would then incorporate this value into their calculations to drive the design of their enclosure, heat-exchange system, and power supply.

In the past, when the maximum power was lower, such as 12 W, a variance in one direction or the other was not that crucial. But today, with the power dissipation of DSP cards frequently measuring in triple digits of watts, it has become necessary for system integrators to become much more knowledgeable and precise about how much power is being used and when. The risks of not having accurate measurement include: systems that don’t work or, more commonly, the costly overdesign of DSP systems in weight, size, and dollars. Exacerbating this problem is the wide variance of power that a DSP card can require. This is a function of what the software is doing and the operational temperature of the system, which, because of the leakage currents of small geometry silicon, can have a significant impact. Advanced power management capabilities onboard the DSP card can provide the accurate measurements required.

The difficulty of per-slot power measurement

Because it is difficult for board vendors to provide precise power consumption guidance, it is incumbent on the system designer to make measurements while running the actual application (or proxy) under representative operating temperatures. Making such measurements, however, is quite challenging. Determining the power of the entire system is not hard, but how much of that power is being delivered to slot 3? The system integrator needs a specially instrumented backplane to be able to determine the per-slot usage. (Extender cards are no longer viable for use with modern high-speed standards such as VPX and VXS since they introduce excessive signal degradation.) One possibility is to measure the system with only one card installed, but then the system software obviously does not run, which results in a software engineering task of writing stand-alone proxies for the system software to support the test. This challenge is mitigated by adding the ability to measure power consumption to each individual DSP card.

The cost of ‘over-design’ for worst-case scenarios

Knowing the actual power usage of a DSP card can provide significant benefits to a system designer. (A representative thermal plot is shown in Figure 1.) It is very common that DSP cards are used in a less-demanding way than that for which they are tested. The vendor, though, is obliged to test that card for power consumption using an approach that represents the 95th percentile of power of potential usage. Today‚Äôs ‚Äúmaximum power‚Äù number, for example 120 W, might represent a pessimistic, but not impossible, usage scenario.

Figure1
Figure 1: A representative thermal plot showing the power dissipation on a multiprocessor DSP card.

Vendors provide system designers with a power specification that represents a demanding use of the card that the large majority of users might never achieve. In fact, some subset of customers will use a given card in significantly less demanding ways. When customers buy a specific card, they have no way of knowing if their card will be one of those 20 percent or so using much less power – unless they have the ability to measure the usage, which, as mentioned, is very difficult today.

Onboard power management simplifies the task of accurately characterizing a specific board’s actual power usage. Consequently, designers are taking advantage of the knowledge that some systems or operational modes of a system are used at a low-duty cycle. The attack mode of a fast-jet radar, for instance, spends most of its life unused. At the platform level, such systems could communicate to provide intelligent sharing of the overall power budget, allowing trade-offs between systems to occur and affording occasionally used systems temporary high-power budgets. If, for example, attack mode requires a 200 W increase in power, the integrator can design the system to adjust other subsystems’ power to live within a given power constraint. (Perhaps search radars or electronic countermeasure systems are not needed in attack mode.) This approach can provide increased power to the attack radar than might have previously been expected if the design were based on worst-case numbers.

The domino effect of overdesigning systems

When the only number that the system designer has available is the “worst-case” number, the consequence can be costly system-level overdesign. For example, adding 10 W to the board results in 12 W (with margin) being added to the power supply. This leads to unnecessarily higher-capacity heat exchangers and fans, which can significantly burden the final system. Every additional watt coursing through a piece of embedded electronics has a cost, incurring bigger, heavier systems to deliver it and then dissipate it.

Increasing the wattage of each board in a system by 10 W could potentially affect several areas of the system. The increased wattage could require changes to the cooling solution. The fans used, amount of air intake/exhaust, or overall cooling solution ‚Äì convection, conduction, hybrid, or liquid cooling ‚Äì might be affected. The result could be larger fans that add weight or a consequent need to change the chassis size. Perhaps for conduction-cooled applications where the heat dissipation is at the borderline of the limits, it might be necessary to incorporate liquid-heat exchange in the sidewalls to provide extra cooling.

The additional wattage could also affect the power supplies, wiring gauge, and number of power bugs on the backplane (which, worst-case, could require more backplane area and thus a large backplane). These changes could also affect the weight and/or even the size of the enclosure. Again, it all depends on whether the baseline system is already near the limits of the specification. If so, even 10 Wper slot could potentially dictate a larger, heavier system with attendant costs, or more likely, a costly redesign of the system to meet the size, weight, and power requirements but delivering less functionality. In either circumstance, the warfighter suffers when system integrators cannot precisely predict and characterize the power consumption of their system.

Advanced power management delivers accurate system measurement

If the board can inform the system designer how much power it is using, it becomes much easier for the designer to know precisely how much power the application is using. Onboard card advanced power management is the missing element, and the advantages are multifold:

  • It will improve the ability of system designers to better optimize cooling solutions.
  • Systems can incorporate power management data into diagnostic and prognostic analysis that can direct maintenance actions before serious damage occurs because of a cooling failure.
  • The customer is empowered to ascertain actual usage numbers in the lab environment and design the system to match that reality.
  • If a card is used in a less-demanding fashion than anticipated, the system designer won‚Äôt be able to take that fact into account until after the system is designed, when it is too late to be useful information.

Powerful embedded digital signal processing engines for military applications, such as the CHAMP-AV6 (Figure 2), are typically limited by the amount of power they are able to dissipate or by how much power the chassis is able to absorb. To address this issue, new DSP cards products will have greater capabilities to measure their own power and what is happening in the system. This will help put an end to design for worst-case scenario and to costly overdesign. CS

Figure2
Figure 2: Curtiss-Wright Controls Embedded Computing’s CHAMP-AV6 quad processor DSP engine

Ian Stalker is the DSP product manager for Curtiss-Wright Controls Embedded Computing. He has more than 20 years of experience in the embedded industry and holds a degree in Electronics Engineering. He can be contacted at ian.stalker@curtisswright.com.

Curtiss-Wright Controls Embedded Computing 703-779-7800 www.cwcembedded.com




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