vme and critical systems,architecture          Other topics:   OpenVPX, RTOS, multicore, VPX, AdvancedTCA, microcontroller, FPGAs, analog-to-digital
VME and Critical Systems
home
articles & topics
product search
White Papers
newswire
E-letter
E-cast Schedule
articles >
Application Feature
vme and critical systems,architecture
RSS Link
Industry News - Top Stories:
vme and critical s...
  • RSS
    • Top Stories Only
    • All Headlines
  • Atom (full text)
    • Top Stories Only
    • All Headlines
  • Kontron XMC-ETH2: Robust dual Gigabit Ethernet mezzanine board with long-term availability
    10 months ago
  • DDC-I Announces Safety-Critical Migration Path for Wind River Users Targeting Non-Intel Platforms
    1 year ago
  • ALT Software selected to deliver DO- 178B certifiable OpenGL Drivers for ATI RadeonTM E4690 GPU
    1 year ago
  • More Industry News headlines...
Technology Partnerships:
vme and critical s...
  • RSS
    • Top Stories Only
    • All Headlines
  • Atom (full text)
    • Top Stories Only
    • All Headlines
  • US Technologies Offers Testing and Repair of VME, MVME, VMEbus Products
    1 year ago
  • Thales Joins IBM Power.org Open Systems community to Promote Power Architecture Technology
    5 years ago
  • LynxOS 4.0 from LynuxWorks to Support Motorola's New MVME6100 Single-board Computer
    4 years ago
  • More Technology Partnerships headlines...
Contracts:
vme and critical s...
  • RSS
    • Top Stories Only
    • All Headlines
  • Atom (full text)
    • Top Stories Only
    • All Headlines
  • Tekmicro supplies signal processing system for NASA
    3 years ago
  • Tundra Semiconductor's Serial RapidIO Switch Selected by VMETRO
    2 years ago
  • BAE Systems selects VMETRO Conduction Cooled Processors
    4 years ago
  • More Contracts headlines...
New Products:
vme and critical s...
  • RSS
    • Top Stories Only
    • All Headlines
  • Atom (full text)
    • Top Stories Only
    • All Headlines
  • TEK Microsystems to Extend QuiXilica VXS Product Line to OpenVPX Architecture
    10 months ago
  • New VPX Mesh Hybrid Backplane from Bustronic
    1 year ago
  • Elma Bustronic has Over 30 Standard Slot Sizes for 6U and 7U VME64x Backplanes
    11 months ago
  • More New Products headlines...
People:
vme and critical s...
  • RSS
    • Top Stories Only
    • All Headlines
  • Atom (full text)
    • Top Stories Only
    • All Headlines
  • Nallatech Appoints New Chairman
    3 years ago
  • USMC 234th Birthday Tribute Video
    9 months ago
  • VMETRO Bolsters Leadership Team
    5 years ago
  • More People headlines...
Mergers and Acquisitions:
vme and critical s...
  • RSS
    • Top Stories Only
    • All Headlines
  • Atom (full text)
    • Top Stories Only
    • All Headlines
  • Eurotech Acquires Japanese Embedded Systems Company Advanet
    2 years ago
  • AIM-USA, LLC Acquires Precision Fibre Channel, LLC to Consolidate Fibre Channel Product Line
    2 years ago
  • Kontron signs contract to acquire Thales Computers
    2 years ago
  • More Mergers and Acquisitions headlines...
Conferences and Awards:
vme and critical s...
  • RSS
    • Top Stories Only
    • All Headlines
  • Atom (full text)
    • Top Stories Only
    • All Headlines
  • RapidIO is the Right Serial Interconnect for Critical Embedded Systems
    3 years ago
  • Klocwork Insight Selected For VME and Critical Systems Editor's Choice Award
    2 years ago
  • Themis Computer's Quorum Resource Manager Software Wins Grid Technology Award at LinuxWorld 2006
    4 years ago
  • More Conferences and Awards headlines...
Media and Education:
vme and critical s...
  • RSS
    • Top Stories Only
    • All Headlines
  • Atom (full text)
    • Top Stories Only
    • All Headlines
  • OpenSystems Publishing Renames VMEbus Systems Magazine to 'VME and Critical Systems' Magazine
    3 years ago
  • OpenSystems Publishing Launches New VME E-site
    3 years ago
  • Mission Critical COTS Solutions Described in New Aitech Shortform Brochure
    5 years ago
  • More Media and Education headlines...
Standard Certifications and References:
vme and critical s...
  • RSS
    • Top Stories Only
    • All Headlines
  • Atom (full text)
    • Top Stories Only
    • All Headlines
  • BittWare Commits to Long Term VITA 41 VXS Roadmap
    4 years ago
  • VITA Releases Summary of Ratified Standards
    7 months ago
  • SIE Computing Solutions Achieves AS9100 Certification
    1 week ago
  • More Standard Certifications and References headlines...
Browse topics
Search Articles
Browse Articles
See Also:
Military Articles
Embedded Computing Articles
CompactPCI Articles
Magazine >

About the Magazine
Editorial Topics
Free Subscription
Reader Service Card
Search Articles
Search Products
Contact Information
Columns

Editor's Foreword
VITA News
VITA Standards
Technology in Europe
Military Technology Insider
Guest Editorial
Defining Standards
Departments

Editor's Choice Products
by Chris A. Ciufo
VMEnow Blog
What is VME?
VME: Then & NOW
Webcasts

Upcoming E-casts
Archived E-casts
Submissions

Submit a Press Release
Submit a New Product
Submit an Abstract for Review
Vendors/Sponsors

Do an E-cast
Preferred Vendors
Upcoming Issue
Advertise
Editorial Calendar
Media Kits










February 2008

CORBA for FPGAs: Tying together GPPS, DSPs, and FPGAs

By
Joseph M Jacob
Objective Interface Systems

Alternatives to custom bridges

Figure2
Figure 2
(click graphic to zoom by 3.9x)

Custom GPP-to-FPGA bridging solutions are currently employed to connect FPGAs into a CORBA system, but all of these approaches suffer from one or more problems:

  • They do not comprehensively address CORBA communications, limiting object mobility and preventing true location transparency.
  • They require a (potentially dedicated) GPP to act as a CORBA bridge or proxy to the FPGA, limiting throughput and increasing system size, weight and power.
  • They are custom solutions, lacking COTS support and requiring an investment in custom software and hardware that must be supported for the lifecycle of the product.

As signal processing systems become larger and more complex, system builders are running into a performance wall. In order to achieve the desired performance requirements of these extensive systems, modern signal processing systems often combine Digital Signal Processors (DSPs), General Purpose Processors (GPPs) and Field Programmable Gate Arrays (FPGAs).

To facilitate development of such multi-processor systems, designers can now use a distributed communications architecture: the Common Object Request Broker Architecture (CORBA). CORBA enables pieces of programs, called objects, to communicate with one another over networks—regardless of the programming language in which they are written, the operating system on which they are running, or their location in the system. This approach provides a number of advantages to system developers: Object request broker (ORB)-enabled GPPs, DSPs, and FPGAs offer a common communications paradigm among disparate engineering disciplines, important in environments in which these development groups often work in isolation.

Additional technical advantages of using ORBs across processor architectures include increased portability of algorithms and logic throughout systems, as well as an improved ability to migrate functionality from GPPs to FPGAs without structurally modifying applications. Perhaps most importantly, ORB-enabled devices give the freedom to do away with specialized interfaces for DSPs and FPGAs—allowing system architects to focus on improving application functionality while the ORBs deliver the necessary interface details for GPP, DSP and FPGA developers.

Features of ORB-enabled GPPs, DSPs, and FPGAs

  • Offer common communications paradigm among “siloed” engineering groups
  • Increase portability of algorithms and logic throughout the system
  • Migrate functionality from GPP to FPGA at any time
  • Keep the focus on application functionality by freeing developers from specialized interfaces for DSPs and FPGAs

Benefits of CORBA for FPGAs FPGAs are often used for large-scale development projects such as wireless base stations and software defined radios (SDRs)—applications typically calling for multiprocessor communications. Historically, however, FPGAs have not been supported by CORBA, requiring FPGA developers to hand-code hardware communications interfaces, an extremely time-consuming process both for the initial implementation and for changes as the design progresses.

“Placing the ORB directly into FPGA hardware eliminates the need for a host GPP to provide CORBA-bridging services.”
Industry demand for software that enables easy integration of FPGAs into a variety of signal processing applications has spawned a solution. A CORBA ORB designed specifically for FPGAs is now available, implemented in VHSIC Hardware Description Language (VHDL) directly into hardware blocks. Providing performance increases of up to 100x over software running on a GPP, this CORBA ORB, ORBexpress FPGA from Objective Interface, creates a simple, high-performance abstraction layer between the developer’s modules and the hardware communications interfaces. The ORB provides a number of benefits to FPGA developers: location transparency and processing mobility; support for the full range of ideal data types; and last, but not least, support for partial reconfiguration on the FPGA.

Location transparency and processing mobility Placing the ORB directly into FPGA hardware eliminates the need for a host GPP to provide CORBA-bridging services and brings the FPGA into the CORBA world as a peer to other processing devices. With custom communication services replaced by standard CORBA operations, system architects and programmers gain a single, consistent view of all system resources.

Figure1
Figure 1
(click graphic to zoom by 1.9x)

The most significant benefit gained by this consistent view is enabling CORBA location transparency across an entire heterogeneous system. The top-level view of a CORBA application can remain unchanged as objects are migrated among computational resources. For example, an application under development can initially implement and test all operations in standard GPP resources, providing early validation of the architecture and implementation. As the FPGA elements of the design mature, operations can easily be transparently migrated into the FPGA and validated against the existing GPP implementation.

What is CORBA?

For systems that need small memory footprint and deterministic execution, embedded developers can use the Common Object Request Broker Architecture (CORBA), an Object Management Group (OMG) standard. CORBA provides an easy-to-use architecture for distributed processing that fits systems from the largest server farms to the smallest networked DSPs.

In recent years, the demand for embedded CORBA has been driven by user requirements for compact size, speed and performance, especially in the telecommunications and defense industries.

RETURN to TOP

Support for ideal data types Eliminating the GPP bridge also removes a performance bottleneck and allows the FPGA to operate at full hardware data rates. For example, ORBexpress FPGA processes and delivers a CORBA message in a fraction of a microsecond. The message processing path is in effect fully pipelined, allowing the ORB to maintain high sustained transport bandwidth. Given sufficient I/O connectivity, tests demonstrate sustained processing rates of several million CORBA transactions per second.

This cross-device solution is ideal for environments that require high performance yet programming flexibility. SDRs, wireless base stations, medical devices, robotics and other types of high performance systems can benefit substantially from this cross-device flexibility.

Support for partial reconfiguration What puts the ORB at the state-of-the-art for component-based development is that it exploits the full potential of the partial reconfiguration feature of Xilinx Virtex FPGAs.

The term “reconfiguration” is used to describe an FPGA’s capability to be reprogrammable by loading a new bitstream from memory. Typically, the entire device needs to be reconfigured, which means that for a certain period of time (typically, milliseconds), the device is rendered inactive until the new bitstream is loaded. The term “partial reconfiguration” refers to the ability of an FPGA to reconfigure a portion of the device without affecting the operation of the rest of it. In this way, partial reconfiguration (PR) allows a designer to time multiplex the resources within an FPGA.

There are many use cases for partial reconfiguration, including:

  • Supporting a multi-mode waveform in a smaller, lower-power and lower-cost FPGA by only loading the modes required at a given point in time, rather than having to load all modes even though only a couple may be in operation.
  • Supporting multiple waveforms in a single FPGA, rather than having to use multiple FPGAs. In this scenario, a new waveform can be loaded into another portion of the device while maintaining an existing waveform.
  • Achieving faster reconfiguration time by not having to reload the static infrastructure (such as interfaces) during reconfiguration.
  • Maintaining the embedded processor such that it can continue to act as a controller even if the rest of the FPGA is not required at a given moment in time.

In the first couple of use cases, the primary benefit to the end user is having a smaller, lower-power and lower-cost platform which provides the same functionality. In the latter couple of use cases, the benefit to the end user is faster response time when a new application needs to be loaded. The ORB enables developers to more easily implement and take advantage of such partial reconfiguration through a standards-based, easy-to-use communications framework for re-loading the reconfigurable portion of the FPGA.

Joseph M. Jacob is the Senior Vice President, Sales and Marketing of Objective Systems, Inc., the worldwide leader in communications middleware for high-performance, real-time, and embedded systems. Since joining Objective Interface in 2003, Joe has led the company’s sales, marketing, business development, and product management teams. Joe is a frequent presenter on the use of communications middleware in Software Defined Radio (SDR) and the Multiple Independent Levels of Security/Safety (MILS) architecture. He has authored articles on SDR and MILS applications that have been published in both the United States and in Europe. Joe is co-chair of the Avionics Special Interest Group at the SDR Forum. Joe holds a B.A. from the University of Illinois at Urbana-Champaign with a double major in economics and political science. He also holds a Juris Doctor degree from Harvard Law School.

Manuel Uhm is Senior Marketing Manager for the DSP Division at Xilinx responsible for strategic marketing and development of Division roadmaps for Defense, Horizontal IP and Boards. Manuel joined Xilinx in 2004 and is considered a thought leader in identifying trends in SDR, DSP, and other communications technologies. Manuel is currently co-chair of the markets committee of the SDR Forum, as well as being on the advisory board for PennWell’s Military Technologies Conference. Prior to joining Xilinx, Manuel was responsible for marketing at Spectrum Signal Processing, Inc. He received his Master of Business Administration from Simon Fraser University and studied electrical engineering at Queen’s University.

Objective Interface Systems 13873 Park Center Road, Suite 360 Herndon, VA 20171 Email: joe.jacob@ois.com U.S. Tel: 1-800-800-OIS7 or 1-703-295-6500 Europe Tel: +33 (0) 6 68 35 15 45 Japan Tel: +81 (0) 3-5623-2112 Fax: 1-703-295-6501

XILINX 2100 Logic Drive San Jose, CA 95124 Email: manuel.uhm@xilinx.com Tel: 1-408-559-7778 Fax: 1-408-559-7114




©MMIX VME and Critical Systems. An OpenSystems Media, LLC publication.
About this Magazine and Website | Contact Us | VME and Critical Systems Media Kit